Commodore Amiga - Page 295

RS3-RSO - address inputs
The address inputs select the internal registers as described by
the register map.
DB7-DBO - data bus inputs/outputs
The eight data bus output pins transfer information between the 8520
and the system data bus. These pins are high inpedance inputs unless
CS is low and R/W and 02 are high, to read the device. During this
read, the data bus output buffers are enabled, driving the data from
the selected register onto the system data bus.
IRQ - interrupt request output
IRQ is an open drain output normally connected to the prcx.essor
interrupt input. An external pull-up resistor holds the signal
high, allowing multiple IRQ outputs to be connected together. The
IRQ output is normally off (high inpedance) and is activated low
as indicated in the functional description.
RES - reset input
A low on the RES pin resets all internal registers. The port pins
are set as inputs and port registers to zero (although a read of
the ports will return all highs because of passive pull-ups) •
The timer control registers are set to zero and the timer latches
to all ones. All other registers are reset to zero.
REGISTER MAP
Each 8520 has 16 registers that you may read or write. Here is the
list of registers and the access address of each within the memory
space dedicated to the 8520:
Register
RS3 RS2 RSl RSO :# (hex) NAME MEANING
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0 0 0
PRA
Peripheral data register A
0
It 1 1 PRB
Peripheral data register B
0
1
0
2
DORA
Data direction register A
0
1
1
3 DDRB
Direction register B
1 0 0
4
TALC>
Timer A low register
1 0 1 5 TAHI
Timer A high register
1
1
0 6 TBLO
Timer B low register
1
1
1 7
TBHI
Timer B high register
0
0
0
8
Event LSB
0
0
1
9
Event 8-15
0
1
0
A
Event MSB
0 1 1 \ ~,
No connect
1
0 0 C SDR
Serial data register
1 0 1 D,
ICR
Interrupt control register
1
1
0
E
' , CRA
Control register A
1
1
1
F
'
CRB
Control register B
SOFTWARE NOTE:
The operating system kernel has already allocated the
use of all four of the timers TA and TB in the 8520s.
If you are running under control of the system exec,
be aware of the follOWing allocation of system resources:
8520A, timer A -- CoDmodore serial COIIIIIUDications
(if no serial COIIIIIUDications is
happening, timer becomes available).
8520A, timer B -- Video beam follower
(used when synchronizing the bl1tter
device to the video beam, see the
description of QBSBl1t () in the system
software manual). If no beam-sync'ed
bl1ts are in process, this timer
will be available.
8520B, timer A -- Keyboard (used continuously, whenever
system Exec is in control) •
8520B,
timer B -- Virtual timer device (used
continuously whenever system Exec is
in control; used for task switching
and interrupts) •
REGISTER NAMES
The names of the registers within the 8520s are as follows. The
address at which each is to be accessed is given in this l1st.