Xtium-CL MX4 User's Manual Technical Specifications • 93
J3: Camera Link Connector 1
Name Pin # Type Description
BASE_X0- 25 Input Neg. Base Data 0
BASE_X0+ 12 Input Pos. Base Data 0
BASE_X1- 24 Input Neg. Base Data 1
BASE_X1+ 11 Input Pos. Base Data 1
BASE_X2- 23 Input Neg. Base Data 2
BASE_X2+ 10 Input Pos. Base Data 2
BASE_X3- 21 Input Neg. Base Data 3
BASE_X3+ 8 Input Pos. Base Data 3
BASE_XCLK- 22 Input Neg. Base Clock
BASE_XCLK+ 9 Input Pos. Base Clock
SERTC+ 20 Output Pos. Serial Data to Camera
SERTC- 7 Output Neg. Serial Data to Camera
SERTFG- 19 Input Neg. Serial Data to Frame Grabber
SERTFG+ 6 Input Pos. Serial Data to Frame Grabber
CC1- 18 Output Neg. Camera Control 1
CC1+ 5 Output Pos. Camera Control 1
CC2+ 17 Output Pos. Camera Control 2
CC2- 4 Output Neg. Camera Control 2
CC3- 16 Output Neg. Camera Control 3
CC3+ 3 Output Pos. Camera Control 3
CC4+ 15 Output Pos. Camera Control 4
CC4- 2 Output Neg. Camera Control 4
PoCL 1,26 +12 V (see note following table)
GND 13, 14 Ground
Notes on PoCL support:
Refer to Sapera’s parameter CORACQ_PRM_POCL_ENABLE to enable PoCL and
CORACQ_PRM_SIGNAL_STATUS/CORACQ_VAL_SIGNAL_POCL_ACTIVE to verify if the POCL is
active. See also Sapera++ reference parameter SapAcquisition::SignalPoCLActive for the
current state.
PoCL state is maintained as long as the board is not reset
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