Dalsa Xtium-CL MX4 User Manual

92 • Technical Specifications Xtium-CL MX4 User's Manual
Status LED Functional Description
D1 Boot-up/PCIe status LED
Color State Description
Red Solid FPGA firmware not loaded
Green Solid Normal FPGA firmware loaded, Gen2 speed, link width x4
Green Flashing Normal FPGA firmware loaded, Gen1 speed, link width x4
Solid Normal FPGA firmware loaded, Gen2 speed, link width not x4
Flashing Normal FPGA firmware loaded, Gen1 speed, link width not x4
Blue Solid Safe FPGA firmware loaded, Gen2 speed
Blue Flashing Safe FPGA firmware loaded, Gen1 speed
Red Flashing PCIe Training Issue – Board will not be detected by computer
Camera Link LEDs
(D4 = Camera Link connector #1, D3 = Camera Link connector #2)
Color State Description
Red Solid No Camera Link pixel clock detected
Green Solid
Camera Link pixel clock detected. No line valid detected.
Note: for D3, when configuring for Full Camera Link, both pixel clock on
the 2
nd
cable must be detected.
Green
Slow Flashing
~1 Hz
Camera Link pixel clock and line valid signal detected
Note: for D3, when configuring for Full Camera Link, both line valid on
the 2
nd
cable must be detected.
Green
Fast Flashing
~8 Hz
Acquisition in progress
 Notes 1: When using a Full configuration, if the input on CL1 is configured as Camera Link
Base, the D3 (for CL2) will remain RED at all times.
 Note 2: LED D3 and D4 are independent.
 Note 3: Full FPGA defaults to Camera Link Medium configuration.
 Note 4: For a Pixel Clock and Line Valid to be detected, the following rules apply:
• CL1: Requires 1 clock and 1 LVAL
• CL2: Camera Link Base configuration: N/A
• CL2: Camera Link Medium configuration requires 1 clock and 1 LVAL
• CL2: Camera Link Full/80-bit configurations requires 2 clocks and 2 LVAL

Dalsa Xtium-CL MX4 Specifications

General

Brand	Dalsa
Model	Xtium-CL MX4
Category	Motherboard
Language	English