Edge-Core AS7326-56X - Page 129

EDGECORE NETWORKS CORPORATION 2018
129
3
Port7_Active_R
(P5_Lane0_LED_R)
R/W
0
1: Port7_R Active ON
0: Port7_R Active OFF (Default)
2
Port7_B
(P5_Lane0_LED_B)
R/W
1
1: Port7_B LED OFF (Default)
0: Port7_B LED ON
1
Port7_G
(P5_Lane0_LED_G)
R/W
1
1: Port7_G LED OFF (Default)
0: Port7_G LED ON
0
Port7_R
(P5_Lane0_LED_R)
R/W
1
1: Port7_R LED OFF (Default)
0: Port7_R LED ON
5.12.4.26. Offset 0x27 SFP28 RGB LED -8 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port8_Active_B
(P12_Lane3_LED_B)
R/W
0
1: Port8_B Active ON
0: Port8_B Active OFF (Default)
4
Port8_Active_G
(P12_Lane3_LED_G)
R/W
0
1: Port8_G Active ON
0: Port8_G Active OFF (Default)
3
Port8_Active_R
(P12_Lane3_LED_R)
R/W
0
1: Port8_R Active ON
0: Port8_R Active OFF (Default)
2
Port8_B
(P12_Lane3_LED_B)
R/W
1
1: Port8_B LED OFF (Default)
0: Port8_B LED ON
1
Port8_G
(P12_Lane3_LED_G)
R/W
1
1: Port8_G LED OFF (Default)
0: Port8_G LED ON
0
Port8_R
(P12_Lane3_LED_R)
R/W
1
1: Port8_R LED OFF (Default)
0: Port8_R LED ON
5.12.4.27. Offset 0x28 SFP28 RGB LED -9 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port9_Active_B
(P6_Lane1_LED_R)
R/W
0
1: Port9_B Active ON
0: Port9_B Active OFF (Default)
4
Port9_Active_G
(P6_Lane1_LED_G)
R/W
0
1: Port9_G Active ON
0: Port9_G Active OFF (Default)
3
Port9_Active_R
(P6_Lane1_LED_R)
R/W
0
1: Port9_R Active ON
0: Port9_R Active OFF (Default)
2
Port9_B
(P6_Lane1_LED_B)
R/W
1
1: Port9_B LED OFF (Default)
0: Port9_B LED ON
1
Port9_G
(P6_Lane1_LED_G)
R/W
1
1: Port9_G LED OFF (Default)
0: Port9_G LED ON
0
Port9_R
(P6_Lane1_LED_R)
R/W
1
1: Port9_R LED OFF (Default)
0: Port9_R LED ON