Edge-Core AS7326-56X - Page 159

EDGECORE NETWORKS CORPORATION 2018
159
1
Port50_LED1_G
(P53_Lane3_LED_G)
R/W
1
1: Port53_LED1_G LED OFF (Default)
0: Port53_LED1_G LED ON
0
Port53_LED1_R
(P53_Lane3_LED_R)
R/W
1
1: Port53_LED1_R LED OFF (Default)
0: Port53_LED1_R LED ON
5.12.6.30. Offset 0x41 QSFP28 RGB LED -18 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port53_LED2_Active_B
(P53_Lane2_LED_B)
R/W
0
1: Port53_LED2_B Active ON
0: Port53_LED2_B Active OFF (Default)
4
Port53_LED2_Active_G
(P53_Lane2_LED_G)
R/W
0
1: Port53_LED2_G Active ON
0: Port53_LED2_G Active OFF (Default)
3
Port53_LED2_Active_R
(P53_Lane2_LED_R)
R/W
0
1: Port53_LED2_R Active ON
0: Port53_LED2_R Active OFF (Default)
2
Port53_LED2_B
(P53_Lane2_LED_B)
R/W
1
1: Port53_LED2_B LED OFF (Default)
0: Port53_LED2_B LED ON
1
Port53_LED2_G
(P53_Lane2_LED_G)
R/W
1
1: Port53_LED2_G LED OFF (Default)
0: Port53_LED2_G LED ON
0
Port50_LED2_R
(P53_Lane2_LED_R)
R/W
1
1: Port53_LED2_R LED OFF (Default)
0: Port53_LED2_R LED ON
5.12.6.31. Offset 0x42 QSFP28 RGB LED -19 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port53_LED3_Active_B
(P53_Lane1_LED_B)
R/W
0
1: Port53_LED3_B Active ON
0: Port53_LED3_B Active OFF (Default)
4
Port53_LED3_Active_G
(P53_Lane1_LED_G)
R/W
0
1: Port53_LED3_G Active ON
0: Port53_LED3_G Active OFF (Default)
3
Port53_LED3_Active_R
(P53_Lane1_LED_R)
R/W
0
1: Port53_LED3_R Active ON
0: Port53_LED3_R Active OFF (Default)
2
Port53_LED3_B
(P53_Lane1_LED_B)
R/W
1
1: Port53_LED3_B LED OFF (Default)
0: Port53_LED3_B LED ON
1
Port53_LED3_G
(P53_Lane1_LED_G)
R/W
1
1: Port53_LED3_G LED OFF (Default)
0: Port53_LED3_G LED ON
0
Port53_LED3_R
(P53_Lane1_LED_R)
R/W
1
1: Port53_LED3_R LED OFF (Default)
0: Port53_LED3_R LED ON
5.12.6.32. Offset 0x43 QSFP28 RGB LED -20 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA