Intel Stratix 10 Configuration User Guide

CvP update mode updates the FPGA core image the using the PCIe link already
established from a previous full chip configuration or CvP init configuration. After the
Intel Stratix 10 enters user mode, you can use the CvP update mode to reconfigure
the FPGA fabric. This mode has the following advantages:
• Allows reprogramming of the core to run different algorithms
• Provides a mechanism for standard updates as a part of a release process.
• Customizes core processing for different components that are part of a complex
system
For both CvP Init and CvP Update modes, the maximum data rate depends on the
PCIe generation and number of lanes.
For more information refer to the Intel Stratix 10 Configuration via Protocol (CvP)
Implementation User Guide .
AS Normal Mode
Active Serial or AS x4 or Quad SPI (QSPI) is an active configuration scheme that
supports flash memories capable of three- and four-byte addressing. The configuration
firmware requires three-byte addressing. After the configuration firmware loads, the
AS x4 flash uses four-byte addressing for the rest of the configuration process. This
mode supports Intel's serial flash configuration memory solution the following third-
party flash devices:
• Micron MT25Q 512 megabytes (MB)
• Macronix MX66U 512 MB, 1 and 2 gigabytes (GB)
• Macronix MX25U 128 MB, 256 MB, and 512 MB
• Micron MT25QU 128 MB, 256 MB, 512 MB, 1 GB, and 2 GB
Refer to the Supported CFI Flash Memory Devices appendix for a complete list of
supported flash devices.
AS Fast Mode
The only difference between AS normal mode and fast mode is speed. Use AS fast
mode when configuration timing is a concern. Use this mode to meet the 100 ms of
power up requirement for PCIe or for other systems with strict timing requirements.
In AS fast mode, the SDM first powers the external AS x4 flash. The power supply
must be able to provide an equally fast ramp up for the Intel Stratix 10 device and the
external AS x4 flash devices. Failing to meet this requirement causes the SDM to
assume missing memory. Consequently, configuration fails.
Refer to the Intel Stratix 10 Device Family Pin Connection Guidelines and AN692:
Power Sequencing Considerations for Intel Cyclone
®
10 GX, Intel Arria
®
10, and Intel
Stratix 10 Devices for additional details
SD MMC
SD MCC is an active configuration scheme. The Intel Stratix 10 SDM can initiate
configuration from the SD MCC cards. The SD MMC mode is almost identical to AS x4.
The difference is that SD MMC are removable and follow a standard protocol. The
advantages of this mode are cost, capacity, availability, portability, and compatibility.
Because Intel Stratix 10 devices operate at 1.8 volt and SD MMC I/Os operate
between 2.7 - 3.6 volts, an intermediate voltage level translator is necessary.
1. Intel
®
Stratix
®
10 Configuration Overview
UG-S10CONFIG | 2018.11.02
Intel Stratix 10 Configuration User Guide
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English