Keithley 2002

IEEE-488 Reference
3-11
Figure 3-7
Arm event status
(B14 - B2)
(B15)
(B1) (B0)
OR
Arm
Condition Register
Arm Event
Enable Register
Seq 1 = Sequence 1 (Set bit indicates that the
2001 is in the arm layer of Sequence 1)
& = Logical AND
OR = Logical OR
PTR = Positive Transition Register
NTR = Negative Transition Register
&
&
0
Seq1
(B14 - B2)
(B15)
(B1) (B0)
0
Seq1
(B14 - B2)
(B15)
(B1) (B0)
0
Always
Zero
Seq1
PTR
NTR
Arm
Transition Filter
Arm Event
Register
(B14 - B2)
(B15) (B1) (B0)
Seq1
To Bit B6 (Arm) of
Operation Event
Condition Register
(See Figure 3-6).
From ORed
Summary of
Sequence Event
Status (See
Figure 3-8).