MEDIATEK Ralink MT7620 - Page 212

PGMT7620_V.1.0_040503
Page 212 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
0
W1C
CPU_FQ_EMPTY
CPU PSE Free Queue Empty Threshold Reached
Interrupt
Asserts when the remaining buffers on the free
queue are lower than the empty threshold and
a forced drop condition has occurred.
0x0
NOTE:
Read:
0: Interrupt not asserted.
1: Interrupt asserted
Write
1: Clear the interrupt
244. FE_INT_ENABLE: Frame Engine Interrupt Enable (offset: 0x000C)
Bits
Type
Name
Description
Initial Value
31
RW
CNT_PPE_AF
Enables the PPE Counter Table Almost Full
interrupt. This interrupt asserts when the PPE
counter table is almost full.
0x0
30
-
-
Reserved
0x0
29
RW
CNT_GDM1_AF
Enables the GDMA1 Counter Table Almost Full
interrupt. This interrupt asserts when the
GDMA1 counter table is almost full.
0x0
28:22
-
-
Reserved
0x0
21
RW
PPE_OTHER_DROP
Enables the GE1 Packet Dropped for Other
Reason interrupt. This interrupt asserts when
GE1 drops a packet due to other reasons (e.g.
too short, too long, FIFO overflow, checksum
error, etc.)
0x0
20
RW
PPE_CRC_DROP
Enables the GE1 CRC Error Dropped Packet
interrupt. This interrupt asserts when the GE1
discards a packet due to CRC error.
0x0
19
RW
PPE_P1_FC
Enables the PSE Port 1 Flow Control Asserted
interrupt. This interrupt asserts when flow
control is asserted on port 1 (GDMA1).
0x0
18
RW
PPE_P0_FC
Enables the PSE Port 0 Flow Control Asserted
interrupt. This interrupt asserts when flow
control is asserted on port 0 (CDMA).
0x0
17
RW
PPE_BUF_DROP
Enables the CPU PSE Buffer Limitation Dropped
Packet interrupt. This interrupt asserts when the
PSE discards a packet due to a buffer sharing
limitation (flow control).
0x0
16
RW
PPE_FQ_EMPTY
Enables the CPU PSE Free Queue Empty
Threshold interrupt. This interrupt asserts when
the remaining buffers on the free queue are
lower than the empty threshold and a forced
drop condition has occurred.
0x0