MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Enables the TCP Segmentation Offload (TSO)
Illegal packet interrupt. This interrupt asserts
when the packet format is not supported by
TSO (e.g., not TSO or IPv4/v6) but when TSO is
enabled for that packet.
Enables the PDMA 2 Rx Ring Flow Control
Interrupt. This interrupt asserts when
any Rx ring is congested and pauses the receive
queue on the switch.
Enables the PDMA 4 Tx Ring Flow Control
Interrupt. This interrupt asserts when the
transmitted queue on the switch is congested
and pauses the PDMA Tx ring.
Enables the GE1 Packet Dropped for Other
Reason interrupt. This interrupt asserts when
GE1 drops a packet due to other reasons (e.g.
too short, too long, FIFO overflow, checksum
error, etc.)
Enables the GE1 CRC Error Dropped Packet
interrupt. This interrupt asserts when the GE1
discards a packet due to CRC error.
Enables the CPU Port1 (GDM) Flow Control
Interrupt. This interrupt asserts when flow
control is asserted on port 1 (GDM).
Enables the CPU Port0 (CDM) Flow Control
Interrupt. This interrupt asserts when flow
control is asserted on port 0 (CDM).
Enables the CPU PSE Buffer Sharing Packet Drop
Interrupt. This interrupt asserts when the CPU
PSE discards a packet due to buffer sharing
limitations (flow control).
Enables the CPU PSE Free Queue Empty
Threshold Reached Interrupt. This interrupt
asserts when the remaining buffers on the free
queue are lower than the empty threshold and
a forced drop condition has occurred.
NOTE:
0: Disable the interrupt.
1: Enable the interrupt.
245. FOE_TS_T: Time Stamp (offset: 0x0010)
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