MEDIATEK Ralink MT7620 - Page 214

PGMT7620_V.1.0_040503
Page 214 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
23:16
RW
ADD_RATE_BYTE
Add Rate Byte
The number of bytes that should be added to
the frame byte length while calculating the rate
limit.
0x18
15:0
RW
FOE_TS_T
Frame Offload Engine Time Stamp
(unit: sec)
0x0
246. IPV6_EXT: IPv6 Extension Header (offset: 0x0014)
Bits
Type
Name
Description
Initial Value
31:24
RW
IP6_EXT3
IPv6 Extension Header #3
0x0
23:16
RW
IP6_EXT2
IPv6 Extension Header #2
0x0
15:8
RW
IP6_EXT1
IPv6 Extension Header #1
0x0
7:0
RW
IP6_EXT0
IPv6 Extension Header #0
0x0
247. G2P_FC: GSW to PDMA Flow Control (offset: 0x0018)
Bits
Type
Name
Description
Initial Value
31:28
RW
WAN_TR3_FCON
PDMA Tx Ring #3 Flow Control by WAN port of
the switch
Selects when to pause Tx ring #3.
Bit[19]: When GSW WAN Q3 is full.
Bit[18]: When GSW WAN Q2 is full.
Bit[17]: When GSW WAN Q1 is full.
Bit[16]: When GSW WAN Q0 is full.
0xF
27:24
RW
WAN_TR2_FCON
PDMA Tx Ring #2 Flow Control by WAN port of
the switch
Selects when to pause Tx ring #2.
Bit[19]: When GSW WAN Q3 is full.
Bit[18]: When GSW WAN Q2 is full.
Bit[17]: When GSW WAN Q1 is full.
Bit[16]: When GSW WAN Q0 is full.
0xF
23:20
RW
WAN_TR1_FCON
PDMA Tx Ring #1 Flow Control by WAN port of
the switch
Selects when to pause Tx ring #1.
Bit[19]: When GSW WAN Q3 is full.
Bit[18]: When GSW WAN Q2 is full.
Bit[17]: When GSW WAN Q1 is full.
Bit[16]: When GSW WAN Q0 is full.
0xF
19:16
RW
WAN_TR0_FCON
PDMA Tx Ring #0 Flow Control by WAN port of
the switch
Selects when to pause Tx ring #0.
Bit[19]: When GSW WAN Q3 is full.
Bit[18]: When GSW WAN Q2 is full.
Bit[17]: When GSW WAN Q1 is full.
Bit[16]: When GSW WAN Q0 is full.
0xF