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PGMT7620_V.1.0_040503
Page 262 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
5
RW
ARP_LKY_VLAN
ARP/RARP Leaky VLAN Enable
1’b0: Disable
1’b1: Enable
0x0
4
RW
ARP_PRI_HIGH
ARP/RARP Force the Highest Priority
1’b0: System default
1’b1: Assigned to the highest priority queue
0x1
3
RW
ARP_MIR
ARP/RARP Mirror Port
1’b0: Disable
1’b1: Frame copied to Mirror port
0x0
2:0
RW
ARP_PORT_FW
ARP/RARP TO_CPU Forwarding
3’b0xx: System default (disabled)
3’b100: System default and CPU port excluded
3’b101: System default and CPU port included
3’b110: CPU port only (As long as the ingress
port is not the CPU port. If the ingress port
is the CPU port, then the system default and
CPU port are excluded.)
3’b111: Frame dropped
0x0
297. BPC: BPDU and PAE Control Register (offset: 0x0024)
Bits
Type
Name
Description
Initial Value
31:28
-
-
Reserved
0x0
27
RW
PAE_MANG_FR
PAE as Management Frame
1’b0: Disable
1’b1: Regarded as management frame
0x1
26
RW
PAE_FR
PAE Frame
1’b0: Disable
1’b1: Regarded as PAE frame
0x1
25
RW
PAE_BPDU_FR
PAE as BPDU Frame
1’b0: Non-BPDU Frame
1’b1: Regarded as BPDU frame
0x0
24:22
RW
PAE_EG_TAG
PAE Egress VLAN Tag Attribution
3’b000: System Default (Disable)
3’b001: Consistent
3’b010, 3’b011: Reserved
3’b100: Untagged
3’b101: Swap
3’b110: Tagged
3’b111: Stack
0x0
21
RW
PAE_LKY_VLAN
PAE Leaky VLAN Enable
1’b0: Disable
1’b1: Enable
0x0
20
RW
PAE_PRI_HIGH
PAE Force the Highest Priority
1’b0: System Default
1’b1: Assigned to the highest priority queue
0x1

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