7.2.9.4. Lane Full Interface...................................................................................................... 141
7.2.9.5. Most Upstream Zone Handshake Interlock.................................................................. 142
7.2.9.6. Most Downstream Zone Handshake Interlock ............................................................. 144
7.2.9.7. Inverting the Pin 2 Signals .......................................................................................... 145
8. IOX Interface Module .......................................................................................................................... 146
8.1. Wake up and/or Lane Full Interface............................................................................................. 148
8.2. Wake up/Lane Full with Wired Terminals..................................................................................... 149
8.3. Wake up/Lane Full with Discrete Signals..................................................................................... 150
8.4. Wake up/Product on Zone Handshake Interlock .......................................................................... 151
8.5. Downstream/Product on Zone Handshake Interlock .................................................................... 152
8.6. Pin 2 Output on Aux I/O M8......................................................................................................... 153
8.7. Pin 2 Output on Wired Terminals................................................................................................. 154
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