13. Timer S
puorG92/C61M
page 147
854fo7002,03.raM21.1.veR
2110-1010B90JER
Figure 13.7 G1PO0 to G1PO7 Registers
Waveform Generation Register j (j=0 to 7)
Symbol
G1PO0 to G1PO2
G1PO3 to G1PO5
G1PO6 to G1PO7
RW
RW
Function Setting Range
b15
(b7)
b8
(b0)
Address
0301
16
-0300
16,
0303
16
-0302
16,
0305
16
-0304
16
0307
16
-0306
16,
0309
16
-0308
16,
030B
16
-030A
16
030D
16
-030C
16,
030F
16
-030E
16
After Reset
Undefined
Undefined
Undefined
When the RLD bit in the G1POCRj register is
set to 0, value written is immediately reloaded
into the G1POj register for output, for example,
a waveform output,reflecting the value.
When the RLD bit is set to 1, value reloaded
while the base timer is reset.
The value written can be read until reloaded
b7 b0
000016 to FFFF16
To Next Page
Loading...
Need help?
General
