20. Flash Memory Version
puorG92/C61M
page 338
854fo7002,03.raM21.1.veR
2110-1010B90JER
20.4.1 EW Mode 0
The MCU enters CPU rewrite mode by setting the FMR01 bit in the FMR0 register to 1 (CPU rewrite mode
enabled) and is ready to accept software commands. EW mode 0 is selected by setting the FMR11 bit in
the FMR1 register to 0.
To set the FMR01 bit to 1, set to 1 after first writing 0. The software commands control programming and
erasing. The FMR0 register or the status register indicates whether a programming or erasing operations
is completed.
When entering the erase-suspend during the auto-erasing, set the FMR40 bit to 1 (erase-suspend en-
abled) and the FMR41 bit to 1 (suspend request). After waiting for td(SR-ES) and verifying the FMR46 bit
is set to 1 (auto-erase stop), access to the user ROM area. When setting the FMR41 bit to 0 (erase
restart), auto-erasing is restarted.
20.4.2 EW Mode 1
EW mode 1 is selected by setting the FMR11 bit to 1 after the FMR01 bit is set to 1 (set to 1 after first
writing 0).
The FMR0 register indicates whether or not a programming or an erasing operation is completed. Read
status register cannot be read in EW mode 1.
When an erase/program command is initiated, the CPU halts all program execution until the command
operation is completed or erase-suspend request is generated.
When enabling an erase-suspend function, set the FMR40 bit to 1 (erase suspend enabled) and execute
block erase commands. Also, the interrupt to transfer to erase-suspend must be set enabled preliminar-
ily. When entering erase-suspend after td(SR-ES) from an interrupt is requested, interrupts can be ac-
cepted.
When an interrupt request is generated, the FMR41 bit is automatically set to 1 (suspend request) and an
auto-erasing is suspended. If an auto-erasing has not completed (when the FMR00 bit is 0) after an
interrupt process is completed, set the FMR41 bit to 0 (erase restart) and execute block erase commands
again.
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