puorG92/C61M
22. Usage Notes
page 423
854fo7002,03.raM21.1.veR
2110-1010B90JER
22.2.2 Power Control
1. When exiting stop mode by hardware reset, the device will startup using the on-chip oscillator.
2. Set the MR0 bit in the TAiMR register(i=0 to 4) to 0 (pulse is not output) to use the timer A to exit stop
mode.
3. When entering wait mode, insert a JMP.B instruction before a WAIT instruction. Do not excute any
instructions which can generate a write to RAM between the JMP.B and WAIT instructions. Disable the
DMA transfers, if a DMA transfer may occur between the JMP.B and WAIT instructions. After the WAIT
instruction, insert at least 4 NOP instructions. When entering wait mode, the instruction queue reads
ahead the instructions following WAIT, and depending on timing, some of these may execute before the
MCU enters wait mode.
Program example when entering wait mode
Program Example: JMP.B L1 ; Insert JMP.B instruction before WAIT instruction
L1:
FSET I ;
WAIT ; Enter wait mode
NOP ; More than 4 NOP instructions
NOP
NOP
NOP
4. When entering stop mode, insert a JMP.B instruction immediately after executing an instruction which
sets the CM10 bit in the CM1 register to 1, and then insert at least 4 NOP instructions. When entering
stop mode, the instruction queue reads ahead the instructions following the instruction which sets the
CM10 bit to 1 (all clock stops), and, some of these may execute before the MCU enters stop mode or
before the interrupt routine for returning from stop mode.
Program example when entering stop mode
Program Example: FSET I
BSET CM10 ; Enter stop mode
JMP.B L2 ; Insert JMP.B instruction
L1:
NOP ; More than 4 NOP instructions
NOP
NOP
NOP
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