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Renesas M16C/29 Series User Manual

Renesas M16C/29 Series
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15. A/D Converter
puorG92/C61M
page 238
854fo7002,03.raM21.1.veR
2110-1010B90JER
Item Specification
Function Bits SCAN1 and SCAN0 in the ADCON1 register and bits ADGSEL1 and
ADGSEL0 in the ADCON2 register select pins. Analog voltage applied
to the selected pins is converted one-by-one to a digital code. At this time,
the input voltage of AN0 and AN1 are sampled simultaneously.
A/D Conversion Start Condition
When the TRG bit in the ADCON0 register is 0 (software trigger)
Set the ADST bit in the ADCON0 register to 1 (A/D conversion started)
When the TRG bit in the ADCON0 register is 1 (hardware trigger)
The trigger is selected by bits TRG1 and HPTRG0 (See Table 15.9)
The ADTRG pin input changes state from “H” to “L” after setting the ADST
bit to 1 (A/D conversion started)
Timer B0, B2 or Timer B2 interrupt generation frequency setting counter
underflow after setting the ADST bit to 1 (A/D conversion started)
A/D Conversion Stop Condition
A/D conversion completed (If selecting software trigger, the ADST bit is
automatically set to 0 ).
Set the ADST bit to 0 (A/D conversion halted)
Interrupt Generation Timing A/D conversion completed
Analog Input Pin Select from AN0 to AN1 (2 pins), AN0 to AN3 (4 pins), AN0 to AN5 (6 pins),
or AN0 to AN7 (8 pins)
(1)
Readout of A/D conversion result
Readout one of registers AN0 to AN7 that corresponds to the selected pin
NOTE:
1. AN0
0 to AN07, AN 20 to AN27, and AN30 to AN32 can be used in the same way as AN0 to AN7. However, all input
pins need to belong to the same group.
15.1.6 Simultaneous Sample Sweep Mode
In simultaneous sample sweep mode, analog voltages applied to the selected pins are converted one-by-
one to a digital code. The input voltages of AN0 and AN1 are sampled simultaneously using two circuits
of sample and hold circuit. Table 15.8 shows the simultaneous sample sweep mode specifications.
Figure 15.16 shows the operation example in simultaneous sample sweep mode. Figure 15.17 shows
registers ADCON0 to ADCON2 and Figure 15.18 shows ADTRGCON registers in simultaneous sample
sweep mode. Table 15.9 shows the trigger select bit setting in simultaneous sample sweep mode. In
simultaneous sample sweep mode, Timer B0 underflow can be selected as a trigger by combining soft-
___________
ware trigger, ADTRG trigger, Timer B2 underflow, Timer B2 interrupt generation frequency setting counter
underflow or A/D trigger mode of Timer B.
Figure 15.16 Operation Example in Simultaneous Sample Sweep Mode
Table 15.8 Simultaneous Sample Sweep Mode Specifications
Example when selecting AN
0
to AN
3
to A/D pins for sweep (SCAN1 to SCAN0 = 01
2
)
A/D conversion started
A/D interrupt request generated
AN
0
AN
1
AN
2
AN
3
AN
4
AN
5
AN
6
AN
7
A/D pin input voltage
sampling
A/D pin conversion

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Renesas M16C/29 Series Specifications

General IconGeneral
BrandRenesas
ModelM16C/29 Series
CategoryMicrocontrollers
LanguageEnglish

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