17. CAN Module
puorG92/C61M
page 291
854fo7002,03.raM21.1.veR
2110-1010B90JER
Figure 17.4 Bit Mapping of Mask Registers in Byte Access
17.1.2 Acceptance Mask Registers
Figures 17.4 and 17.5 show the C0GMR register, the C0LMAR register, and the C0LMBR register, in
which bit mapping in byte access and word access are shown.
Figure 17.5 Bit Mapping of Mask Registers in Word Access
bit 7 bit 0
SID
10 SID9 SID8 SID7 SID6
SID5 SID4 SID3 SID2 SID1 SID0
EID17 EID16 EID15 EID14
EID13 EID12 EID11 EID10 EID9 EID8 EID7 EID6
EID5 EID4 EID3 EID2 EID1 EID0
SID10 SID9 SID8 SID7 SID6
SID5 SID4 SID3 SID2 SID1 SID0
EID17 EID16 EID15 EID14
EID13 EID12 EID11 EID10 EID9 EID8 EID7 EID6
EID5 EID4 EID3 EID2 EID1 EID0
SID10 SID9 SID8 SID7 SID6
SID5 SID4 SID3 SID2 SID1 SID0
EID17 EID16 EID15 EID14
EID13 EID12 EID11 EID10 EID9 EID8 EID7 EID6
EID5 EID4 EID3 EID2 EID1 EID0
C0GMR register
C0LMAR register
C0LMBR register
016016
016116
016216
016316
016416
016616
016716
016816
016916
016A16
016C16
016D16
016E16
016F16
017016
Addresses
CAN0
NOTES
1. is undefined.
2. These registers can be written in CAN reset/initialization mode of the CAN module.
bit 15
bit 0
SID
10
SID
9
SID
8
SID
7
SID
6
SID
5
SID
4
SID
3
SID
2
SID
1
SID
0
bit 8 bit 7
EID
17
EID
16
EID
15
EID
14
EID
13
EID
12
EID
11
EID
10
EID
9
EID
8
EID
7
EID
6
EID
5
EID
4
EID
3
EID
2
EID
1
EID
0
SID
10
SID
9
SID
8
SID
7
SID
6
SID
5
SID
4
SID
3
SID
2
SID
1
SID
0
EID
17
EID
16
EID
15
EID
14
EID
13
EID
12
EID
11
EID
10
EID
9
EID
8
EID
7
EID
6
EID
5
EID
4
EID
3
EID
2
EID
1
EID
0
SID
10
SID
9
SID
8
SID
7
SID
6
SID
5
SID
4
SID
3
SID
2
SID
1
SID
0
EID
17
EID
16
EID
15
EID
14
EID
13
EID
12
EID
11
EID
10
EID
9
EID
8
EID
7
EID
6
EID
5
EID
4
EID
3
EID
2
EID
1
EID
0
C0GMR register
C0LMAR register
C0LMBR register
0160
16
0162
16
0164
16
0166
16
0168
16
016A
16
016C
16
016E
16
0170
16
Addresses
CAN0
NOTES:
1. is undefined.
2. These registers can be written in CAN reset/initialization mode of the CAN module.
To Next Page
Loading...
Need help?
General
