Renesas M16C/29 Series User Manual

16. MULTI-MASTER I
2
C bus INTERFACE
puorG92/C61M
page 273
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Figure 16.12 The timing of the interrupt generation at the completion of the data receive
16.6.3 Bits 2,3 : Port Function Select Bits PED, PEC
If the ES0 bit in the S1D0 register is set to 1 (I
2
C bus interface enabled), the SDAMM functions as an
output port. When the PED bit is set to 1 and the SCLMM functions as an output port when the PEC bit is
set to 1. Then the setting values of bits P2_0 and P2_1 in the port P2 register are output to the I
2
C bus,
regardless of he internal SCL/SDA output signals. (SCL/SDA pins are onnected to I
2
C bus interface
circuit)
The bus data can be read by reading the port pi direction register in input mode, regardless of the setting
values of the PED and PEC bits. Table 16.5 shows the port specification.
Table 16.5 Port specifications
In receive mode, ACK bit = 1 WIT bit = 0
7 clock 8 clock
ACK
clock
1 clock
1 bit7 bit 8 bit ACK bit
S
CL
SDA
ACKBIT bit
PIN flag
Internal WAIT flag
I
2
C bus interface
interrupt request signal
The writing signal of
the S00 register
7 clock 8 clock
ACK
clock
1 bit7 bit
8 bit
S
CL
SDA
ACKBIT bit
PIN flag
Internal WAIT flag
I
2
C bus interface
interrupt request signal
The writing signal of
the S00 register
The writing signal of the S2
0 register
1)
NOTE:
1. Do not write to the I
2
C0 clock control register except the bit ACK-BIT.
In receive mode, ACK bit = 1 WIT bit = 1
2)
emaNniPtiB9SEtiBDEP
2P
0 noitceriDtroP
retsigeR
noitcnuF
2P
0
0- 1/0noitcnufO/ItroP
10 -S
AD noitcnufO/I
11 -S
AD noitcnuftuptuotrop,noitcnuftupni
emaNniPtiB0SEtiBCEP
2P
1 noitceriDtroP
retsigeR
noitcnuF
2P
1
0- 1/0noitcnufO/ItroP
10 -S
LC noitcnufO/I
11 -S
LC noicnuftuptuotrop,noitcnuftupni

Renesas M16C/29 Series Specifications

General

Brand	Renesas
Model	M16C/29 Series
Category	Microcontrollers
Language	English