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Renesas M16C/29 Series - Page 239

Renesas M16C/29 Series
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14. Serial I/O
puorG92/C61M
page 213
854fo7002,03.raM21.1.veR
2110-1010B90JER
Table 14.19 Registers to Be Used and Settings in SIM Mode
Register Bit Function
U2TB
(1)
0 to 7 Set transmission data
U2RB
(1)
0 to 7 Reception data can be read
OER,FER,PER,SUM
Error flag
U2BRG 0 to 7 Set bit rate
U2MR SMD2 to SMD0 Set to 1012
CKDIR Select the internal clock or external clock
STPS Set to 0
PRY Set this bit to 1 for direct format or 0 for inverse format
PRYE Set to 1
IOPOL Set to 0
U2C0 CLK1, CLK0 Select the count source for the U2BRG register
CRS Invalid because CRDis set to 1
TXEPT Transmit register empty flag
CRD Set to 1
NCH Set to 0
CKPOL Set to 0
UFORM Set this bit to 0 for direct format or 1 for inverse format
U2C1 TE Set this bit to 1 to enable transmission
TI Transmit buffer empty flag
RE Set this bit to 1 to enable reception
RI Reception complete flag
U2IRS Set to 1
U2RRM Set to 0
U2LCH Set this bit to 0 for direct format or 1 for inverse format
U2ERE Set to 1
U2SMR
(1)
0 to 3 Set to 0
U2SMR2 0 to 7 Set to 0
U2SMR3 0 to 7 Set to 0
U2SMR4 0 to 7 Set to 0
NOTE:
1. Not all register bits are described above. Set those bits to 0 when writing to the registers in SIM mode.

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