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Renesas M16C Series User Manual

Renesas M16C Series
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UART0 to UART2
M30240 Group
Rev.1.00 Sep 24, 2003 Page 94 of 360
Figure 1.89: Typical transmit timings in UART mode
Transmit enable
bit(TE)
Transmit buffer
empty flag(TI)
TxDi
Transmit register
empty flag (TXEPT)
“0”
“1”
“0”
“1”
“0”
“1”
The above timing applies to the following settings :
• Parity is disabled.
• Two stop bits.
• CTS function is disabled.
Transfer clock
Tc
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
EXT
fi : frequency of BRGi count source (f 1, f8, f32)
f
EXT : frequency of BRGi count source (external clock)
n : value set to BRGi
Transmit interrupt
request bit (IR)
“0”
“1”
Shown in ( ) are bit symbols.
Start
bit
Data is set in UARTi transmit buffer register
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
ST
SP
D
8
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
ST
D
8
D
0
D
1
ST
SPSP
Transferred from UARTi transmit buffer register to UARTi transmit register
Stop
bit
Stop
bit
SP
Cleared to “0” when interrupt request is accepted, or cleared by software
Transmit enable
bit(TE)
Transmit buffer
empty flag(TI)
Transmit register
empty flag (TXEPT)
Start
bit
Parity
bit
TxDi
CTSi
The above timing applies to the following settings :
• Parity is enabled.
• One stop bit.
• CTS function is selected.
• Transmit interrupt cause select bit = “1”.
“1”
“0”
“1”
“L
“H”
“0”
“1”
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
EXT
fi : frequency of BRGi count source (f 1, f8, f32)
f
EXT : frequency of BRGi count source (external clock)
n : value set to BRGi
Transmit interrupt
request bit (IR)
“0”
“1”
Cleared to “0” when interrupt request is accepted, or cleared by software
Shown in ( ) are bit symbols.
Tc
Transfer clock
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
ST P D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
SP ST
PSP
D
0
D
1
ST
Stopped pulsing because transmit enable bit = “0”
Stop
bit
Transferred from UARTi transmit buffer register to UARTi transmit register
The transfer clock stops momentarily as CTS is “H” when the stop bit is checked.
The transfer clock starts as the transfer starts immediately CTS changes to “L”.
Data is set in UARTi transmit buffer register.
“0”
Transmit interrupt cause select bit = "0".
Example of transmit timing when transfer data are 8 bits long (parity enabled, one stop bit)
Example of transmit timing when transfer data are 9 bits long (parity enabled, two stop bits)

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Renesas M16C Series Specifications

General IconGeneral
BrandRenesas
ModelM16C Series
CategoryComputer Hardware
LanguageEnglish

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