Clock-Asynchronous Serial I/O
M30240 Group
Rev.1.00 Sep 24, 2003 Page 213 of 360
Figure 2.64: Set-up procedure of transmission in UART mode (2)
Start transmission
When CTSi input level = “L”
Setting UARTi bit rate generator (i = 0 to 2)
UARTi bit rate generator (i = 0 to 2) [Address 03A1
16, 03A916, 037916]
UiBRG (i = 0 to 2)
Can be set from
00
16 to FF
16
(Note)
b7 b0
Note: Write to UARTi bit rate generator when transmission/reception is halted.
Transmission is complete
Continued from the previous page
UART0 transmit/receive control register 1
U0C1 [Address 03A5
16]
UART1 transmit/receive control register 1
U1C1 [Address 03AD
16]
Transmit enable bit
1 : Transmission enabled
b7 b0
1
Transmission enabled
UART2 transmit/receive control register 1
U2C1 [Address 037D
16]
Transmit enable bit
1 : Transmission enabled
b7 b0
1
Writing transmit data
UART0 transmit buffer register [Address 03A3 16, 03A216] U0TB
UART1 transmit buffer register [Address 03AB 16, 03AA16] U1TB
UART2 transmit buffer register [Address 037B 16, 037A16] U2TB
Setting transmission data
b7 b0 b7 b0
(b15) (b8)
UART0 transmit/receive control register 1
U0C1 [Address 03A5
16]
UART1 transmit/receive control register 1
U1C1 [Address 03AD
16]
b7 b0
Transmit buffer empty flag
0 : Data present in transmit
buffer register
1 : No data present in transmit
buffer register
(Writing next transmit data enabled)
Checking the status of UARTi transmit buffer register (i = 0, 1)
UART2 transmit/receive control register 1
U2C1 [Address 037D
16]
b7 b0
Transmit buffer empty flag
0 : Data present in transmit
buffer register
1 : No data present in transmit
buffer register
(Writing next transmit data enabled)
Writing next transmit data
UART0 transmit buffer register [Address 03A3 16, 03A216] U0TB
UART1 transmit buffer register [Address 03AB 16, 03AA16] U1TB
UART2 transmit buffer register [Address 037B 16, 037A16] U2TB
Setting transmission data
b7 b0 b7 b0
(b15) (b8)
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