Universal Serial Bus
M30240 Group
Rev.1.00 Sep 24, 2003 Page 48 of 360
1.2.18.4.4 USB Power Management Register
The USB Power Management Register, shown in Figure 1.33, is used for power management in the USB
FCU.
• SUSPEND Detection Flag:
When the USB FCU does not detect any bus activity on D+/D- for at least 3ms (and D+/D- are in the J-state),
it sets the Suspend Detection Flag and generates an interrupt. This bit is cleared when signaling from the host
is detected on D+/D- (which sets the Resume Detection Flag and generates an interrupt), or the Remote
Wake-up Bit is set and then cleared by the CPU. If the USB clock was disabled during the suspend state, the
SUSPEND Detection Flag is not cleared until after the USB clock is re-enabled.
• RESUME Detection Flag:
When the USB FCU is in the suspend state and detects activity on D+/D- from the host, it sets the Resume
Detection Flag and generates an interrupt. The CPU writes a “1” to INTST14 (bit 6 of USB Interrupt Status
Register 2) to clear this flag.
• WAKEUP Control Bit:
The CPU writes a “1” to the WAKEUP Control Bit for remote wake-up. While this bit is set and the USB FCU
is in suspend mode, resume signaling is sent to the host. The CPU must keep this bit set for a minimum of
10ms and a maximum of 15ms before writing a “0” to this bit.
Figure 1.33: USB Power Management Register
USB Power Management Register
Symbol Address When reset
USBPM 0301
16
00
16
Bit nameBit symbol
b7 b6 b5 b4 b3 b2 b1 b0
Function
W
R
Reserved Must always be set to "0"
SUSPEND
RESUME
WAKEUP
USB Suspend Detection Flag
USB Resume Detection Flag
USB Remote Wakeup Bit
0 : No USB suspend signal detected
1 : USB suspend signal detected
0 : No USB resume signal detected
1 : USB resume signal detected
0 : End remote resume signaling
1 : Remote resume signaling (Note 2)
Note 1: Write "0" only or Read
Note 2: If SUSPEND = "1"
Note 1
Note 1
0
0
0
0
0
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