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Siemens 7SR51 - Page 370

Siemens 7SR51
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Parameter: Delay 2
Default setting: 120 ms
See Settings Example, Page 370.
Settings Example
50BF DTL1/50BF DTL2
The time delays run concurrently within the relay. The time delay applied to the CB fail protection must be in
excess of the longest CB operate time + relay reset time + a safety margin.
First Stage (Retrip)
Trip relay operate time 10 ms
Reset time 20 ms
CB tripping time 50 ms
Safety margin 40 ms
Overall first stage CBF time delay 120 ms
Second Stage (Back Trip)
First CBF time delay 120 ms
Trip relay operate time 10 ms
CB tripping time 50 ms
Reset time of measuring element 20 ms
Margin 60 ms
Overall second stage CBF time delay 260 ms
The safety margin is extended by 1 cycle for the second CBF stage as this will usually involve a back-trip of a
busbar tripping scheme.
[dw_7SR5_function50BFSettingExample1, 1, en_US]
Figure 6-2 Single Stage Circuit-Breaker Fail Timing
[dw_7SR5_function50BFSettingExample2, 1, en_US]
Figure 6-3 2 Stage Circuit-Breaker Fail Timing
Supervision Functions
6.1 50BF Circuit-Breaker Failure Protection – 3 Pole
370 Reyrolle 7SR5, Overcurrent Protection Device, Device Manual
C53000-G7040-C014-1, Edition 11.2019

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