ST STM32F0 Series User Manual

PM0215 The STM32 Cortex-M0 instruction set
Doc ID 022979 Rev 1 51/91
3.5.2 ANDS, ORRS, EORS and BICS
Logical AND, OR, exclusive OR and bit clear.
Syntax
ANDS {Rd,} Rn, Rm
ORRS {Rd,} Rn, Rm
EORS {Rd,} Rn, Rm
BICS {Rd,} Rn, Rm
where:
● ‘Rd’ is the destination register
● ‘Rn’ is the register holding the first operand and is the same as the destination register.
● ‘Rm’ is the second register.
Operation
The AND, EOR, and ORR instructions perform bitwise AND, exclusive OR, and inclusive OR
operations on the values in Rn and Rm.
The BIC instruction performs an AND operation on the bits in Rn with the logical negation of
the corresponding bits in the value of Rm.
The condition code flags are updated on the result of the operation, seeThe condition flags
on page 39.
Restrictions
In these instructions, Rd, Rn, and Rm must only specify R0-R7.
Condition flags
These instructions:
● update the N and Z flags according to the result
● do not affect the C or V flag.
Examples
ANDS R2, R2, R1
ORRS R2, R2, R5
ANDS R5, R5, R8
EORS R7, R7, R6
BICS R0, R0, R1

ST STM32F0 Series Specifications

General

Brand	ST
Model	STM32F0 Series
Category	Microcontrollers
Language	English