The STM32 Cortex-M0 instruction set PM0215
56/91 Doc ID 022979 Rev 1
3.5.7 REV, REV16, and REVSH
Reverse bytes and reverse bits.
Syntax
op Rd, Rn
where:
● ‘op’ is one of:
REV: Reverse byte order in a word
REV16: Reverse byte order in each halfword independently
REVSH: Reverse byte order in the bottom halfword, and sign extends to 32 bits
● ‘Rd’ is the destination register
● ‘Rn’ is the register holding the operand
Operation
Use these instructions to change endianness of data:
●
REV
: Converts either:
– 32-bit big-endian data into little-endian data or
– 32-bit little-endian data into big-endian data.
●
REV16
: Converts either:
– 2 packed 16-bit big-endian data into little-endian data or
– 2 packed 16-bit little-endian data into big-endian data.
●
REVSH:
Converts either:
– 16-bit signed big-endian data into 32-bit signed little-endian data or
– 16-bit signed little-endian data into 32-bit signed big-endian data
Restrictions
In these instructions, Rd, and Rn must only specify R0-R7.
Condition flags
These instructions do not change the flags.
Examples
REV R3, R7 ; reverse byte order of value in R7 and write it to R3
REV16 R0, R0 ; reverse byte order of each 16-bit halfword in R0
REVSH R0, R5 ; reverse Signed Halfword