ST STM32F0 Series User Manual

PM0215 The STM32 Cortex-M0 instruction set
Doc ID 022979 Rev 1 63/91
3.7.3 DMB
Data memory barrier.
Syntax
DMB
Operation
DMB acts as a data memory barrier. It ensures that all explicit memory accesses that
appear, in program order, before the DMB instruction are completed before any explicit
memory accesses that appear, in program order, after the DMB instruction. DMB does not
affect the ordering or execution of instructions that do not access memory.
Restrictions
None
Condition flags
This instruction does not change the flags.
Examples
DMB ; Data Memory Barrier
3.7.4 DSB
Data synchronization barrier.
Syntax
DSB
Operation
DSB acts as a special data synchronization memory barrier. Instructions that come after the
DSB, in program order, do not execute until the DSB instruction completes. The DSB
instruction completes when all explicit memory accesses before it complete.
Restrictions
None
Condition flags
This instruction does not change the flags.
Examples
DSB ; Data Synchronisation Barrier

ST STM32F0 Series Specifications

General

Brand	ST
Model	STM32F0 Series
Category	Microcontrollers
Language	English