Vaisala LT31 - Figure 26 Master CPU LTC212; Master CPU LTC212

User's Guide ______________________________________________________________________
58 __________________________________________________________________ M210667EN-C
Master CPU LTC212
The master CPU LTC212 (see Figure 26 below) is located in the
receiver interface unit LTI211.
0808-003
Figure 26 Master CPU LTC212
The CPU module is equipped with:
- H8 CPU
- RAM & Flash memory
- LT Maintenance Interface (RS-232)
- Module interface (RS-485); to control the LT31 system and to collect
raw data