Xilinx Virtex-5 RocketIO GTP User Manual

Virtex-5 RocketIO GTP Transceiver User Guide www.xilinx.com 285
UG196 (v1.3) May 25, 2007
DRP Address by Attribute
R
CLK_COR_DET_LEN_0
39<7> 39<8>
CLK_COR_DET_LEN_1
16<8> 16<7>
CLK_COR_INSERT_IDLE_FLAG_0
39<6>
CLK_COR_INSERT_IDLE_FLAG_1
16<9>
CLK_COR_KEEP_IDLE_0
39<5>
CLK_COR_KEEP_IDLE_1
16<10>
CLK_COR_MAX_LAT_0
38<15>
39<0> 39<1> 39<2> 39<3> 39<4>
CLK_COR_MAX_LAT_1
17<0>
16<15> 16<14> 16<13> 16<12>
16<11>
CLK_COR_MIN_LAT_0
38<9>
38<10>
38<11>
38<12> 38<13> 38<14>
CLK_COR_MIN_LAT_1
17<6> 17<5> 17<4> 17<3> 17<2> 17<1>
CLK_COR_PRECEDENCE_0
38<8>
CLK_COR_PRECEDENCE_1
17<7>
CLK_COR_REPEAT_WAIT_0
38<2> 38<3> 38<4> 38<5> 38<6>
Ta ble D - 2 : DRP Address by Attribute (Continued)
Attribute
Bit
0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Xilinx Virtex-5 RocketIO GTP Specifications

General

Brand	Xilinx
Model	Virtex-5 RocketIO GTP
Category	Transceiver
Language	English