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ADCMT 7352A User Manual

ADCMT 7352A
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7352 Series Digital Multimeter Operation Manual
6.6.5 Status Register Structure
6-46
2. Event enable register
Each event register has an enable register that determines which bit is to be enabled. The enable reg-
ister sets the corresponding bit in decimal.
Service Request Enable Register (SRER) setting: *SRE
Standard Event Status Enable Register (SESER) setting: *ESE
Measurement Event Enable Register (MEER): MSE
Questionable Event Enable Register (QEER): QSE
Operation Event Enable Register (OEER): OSE
3. Status byte register
The status byte register summarizes the information from the status register. A summary of this status
byte register is sent to the controller as a service request. Therefore, the status byte register operates
slightly differently than the status register structure. This section describes the status byte register.
The status byte register structure is shown in Figure 6-4.
Figure 6-4 Status Byte Register Structure
This status byte register follows the status register except for the following three points:
The summary of the status byte register is written to bit6 of the status byte register.
Bit6 of the enable register is always enabled and cannot be changed.
Bit6 (MSS) of the status byte register writes the RQS of the service request.
This register responds to the serial polling from the controller. When the register responds to the serial
polling, bit0 to bit5, bit7, and the RQS of the status byte register are read, and then the RQS is reset
to 0. No other bits are cleared until each factor is set to 0.
The status byte register, RQS, and MSS can be cleared by executing “*CLS”. Consequently, the SRQ
line is set to FALSE.
Status byte register
Service request enable register MSS
MSS
RQS
ESB QSBMAV EVA 1
7 X543210
OSB MSB

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ADCMT 7352A Specifications

General IconGeneral
BrandADCMT
Model7352A
CategoryMultimeter
LanguageEnglish

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