76 Chapter 2
Block Diagrams
A10 Digital IF Assembly
A10 Digital IF Assembly
The A10 digital IF assembly digitizes the 7.5 MHz third IF, by
processing the time domain continuous data into I/Q (in-phase and
quadrature) signals, and delivers the data to the CPU for further
processing and display.
The digital IF assembly performs the following main functions:
• digitizes the 7.5 MHz third IF
• provides input selector switching
• pre-adjusts the variable amplifier for optimum ADC input levels
using the gain range/select rules circuitry
• performs analog to digital conversion
• performs dither generation
7.5 MHz IF
The 7.5 MHz third IF comes from the A12 analog IF assembly. The
maximum input level to the A10 digital IF assembly is +4 dBm.
Exceeding this level will cause distortion and will clip the ADC causing
erroneous measurement results.
Gain Range Select/Rules
This input path is a tapped 21.4 MHz second IF from the A12 analog IF
assembly, which bypasses the 10 MHz anti-alias filters. The gain range
for the A10 assembly with the variable amplifier before the ADC is 0 to
18 dB. (Note: For instruments that have an A10 assembly with part
number E4406-60006 the gain range is
-6 dB to 24 dB.) The gain range select/rules “pre-adjusts” the variable
amplifier for optimum ADC input levels before the 7.5 MHz third IF
arrives at the ADC. Incorrect levels will cause distortion and will clip
the ADC, resulting in erroneous measurements.
ADC
The ADC has one input for the 7.5 MHz third IF from the Analog IF
assembly. The ADC converts these input signals from analog to digital
for processing to the instrument display.
Input Selector Switch
The input selector switch routes the appropriate input signal to the
ADC. The select switch logic comes from the ASIC/Zoom filter.
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