9 I/O PORTS (P)
9-22
Seiko Epson Corporation
S1C17624/604/622/602/621 TECHNICAL MANUAL
P4[7:4] Port Function Select Register (P44_47PMUX)
Register name Address Bit Name Function Setting Init. R/W Remarks
P4[7:4] Port
Function Select
Register
(P44_47PMUX)
S1C17624/622
0x52a9
(8 bits)
D7–6
P47MUX[1:0]
P47 port function select P47MUX[1:0] Function 0x0 R/W EXCL5:
S1C17624 only
(Set EXCL5S to 1.)
0x3
0x2
0x1
0x0
reserved
reserved
TOUT4
P47/EXCL5
D5–4
P46MUX[1:0]
P46 port function select P46MUX[1:0] Function 0x0 R/W
0x3
0x2
0x1
0x0
reserved
reserved
RFCLKO
P46
D3–2
P45MUX[1:0]
P45 port function select P45MUX[1:0] Function 0x0 R/W
0x3
0x2
0x1
0x0
reserved
reserved
SDA1
P45
D1–0
P44MUX[1:0]
P44 port function select P44MUX[1:0] Function 0x0 R/W
0x3
0x2
0x1
0x0
rese
rved
reserved
SCL1
P44
Note: This register is effective only in the S1C17624/622.
The P44 to P47 port pins are shared with the peripheral module pins. This register is used to select how the pins are
used.
D[7:6] P47MUX[1:0]: P47 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): Reserved
0x1 (R/W): TOUT4 (T8OSC1)
0x0 (R/W): P47/EXCL5 (T16A2 Ch.0) (default) (EXCL5 is available only in the S1C17624.)
To use the P47 pin for EXCL5 input, set P4OEN7/
P4_OEN register to 0, P4IEN7/P4_IEN register to 1
and EXCL5S/P54_56PMUX register to 1.
D[5:4] P46MUX[1:0]: P46 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): Reserved
0x1 (R/W): RFCLKO (RFC)
0x0 (R/W): P46 (default)
D[3:2] P45MUX[1:0]: P45 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): Reserved
0x1 (R/W): SDA1 (I2CS)
0x0 (R/W): P45 (default)
D[1:0] P44MUX[1:0]: P44 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): Reserved
0x1 (R/W): SCL1 (I2CS)
0x0 (R/W): P44 (default)