4 POWER SUPPLY
4-2
Seiko Epson Corporation
S1C17624/604/622/602/621 TECHNICAL MANUAL
Internal logic voltage regulator
The internal logic voltage regulator generates the VD1 operating voltage for the internal logic circuits and oscil-
lators. The V
D1 voltage value can be switched in the program; set it to 1.8 V for normal operation and 2.5 V for
Flash programming.
LCD system voltage regulator
The LCD system voltage regulator generates the 1/3-bias LCD drive voltages VC1, VC2, and VC3. In the
S1C17624/604/622/602/621, the LCD drive voltage is supplied to the built-in LCD driver that drives the LCD
panel connected to the SEG and COM pins. The reference voltage (V
C1 or VC2) for the LCD voltage booster/
reducer should be selected using VCSEL/LCD_VREG register according to the power supply voltage V
DD. As
compared to the V
C1 reference voltage, the VC2 reference voltage is lower in current consumption. For the VC1
to V
C3 voltage values, see the “Electrical Characteristics” chapter.
3.2 Power Supply Voltage VTable 4.
DD
and VCSEL Settings
Power supply voltage VDD VCSEL setting Reference voltage
1.8 to 3.6 V 0 V
C1
2.5 to 3.6 V 1 VC2
(Default: 0)
Note: The VC1 to VC3 voltages cannot be obtained correctly if VCSEL is set to 1 when VDD is 2.5 V or
less.
Controlling the Power Supply Circuit4.4
In order to generate the internal operating voltage properly according to the power supply voltage and operating
mode, or to reduce current consumption, the p
ower supply circuit is designed to be controlled with software.
Switching the operating mode
The S1C17624/604/622/602/621 has two kinds of operating modes.
1. Normal operating mode
This mode is provided for running the application program.
V
DD = 1.8 to 3.6 V, internal operating voltage VD1 = 1.8 V
2. Flash erase/programming mode
This mode is provided for erasing and programming the Flash memory.
V
DD = 2.7 to 3.6 V, internal operating voltage VD1 = 2.5 V
The V
D1 voltage value must be switched according to the operating mode as shown above using VD1MD/VD1_
CTL register. Normally set VD1MD to 0 (V
D1 = 1.8 V, default setting). It should be set to 1 before erasing/pro-
gramming the Flash memory.
Note: When the V
D1 voltage is switched, the VD1 voltage requires 5 ms (max.) to stabilize. Flash memory
pro
gramming should be started after the stabilization time has elapsed.
Controlling the LCD power source
The LCD drive voltages VC1 to VC3 will be supplied to the LCD driver by setting the DSPC[1:0]/LCD_DCTL
register to a value other than 0x0 (display off).
When the internal LCD driver is not used, the LCD system voltage regulator should be turned off (DSPC[1:0] =
0) to reduce current consumption.
Power control bit settings
Table 4.4.1 lists the power control bit settings in different operating conditions.
4.1 Power Control Bit SettingsTable 4.
Condition Control bits
Operating mode V
DD LCD driver VD1MD VCSEL DSPC[1:0]
Normal
operating mode
1.8 to 3.6 V Used 0 0 Other than 0x0
2.5 to 3.6 V Used 0 1 Other than 0x0
1.8 to 3.6 V Not used 0 0 0x0
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