1 OVERVIEW
S1C17624/604/622/602/621 TECHNICAL MANUAL
Seiko Epson Corporation
1-3
Block Diagram1.2
CPU Core S1C17
Internal RAM
8K/4K bytes (*1)
I
2
C master
(I2CM)
16-bit timer
(T16)
Clock generator
(CLG)
Clock timer
(CT)
Stopwatch timer
(SWT)
Watchdog timer
(WDT)
16-bit PWM timer
(T16A2) (*2)
IR remote controller
(REMC)
MISC register
(MISC)
LCD driver
(LCD)
SVD circuit
(SVD)
Power generator
(VD1)
Flash memory
128K/64K bytes (*1)
32 bits
16 bits
Interrupt system
8/16 bits
DCLK, DST2,
DSIO
V
DD, VSS, VD1
VC1–VC3, CA, CB
SEG0–55(51)/39(35),
COM0–3(7) (*1)
LFRO
OSC1–2, OSC3–4
FOUT1, FOUTH
EXCL5–6,
CAPA5–6, CAPB5–6
TOUTA5–6, TOUTB5–6
REMI, REMO
P00–07, P10–17,
P20–27, P30–37
P40–P47, P50–56 (*1)
#RESET
TEST
(#TEST)
SIN0–1, SOUT0–1,
SCLK0–1
SDI0, SDO0,
SPICLK0,
#SPISS0
SDA0, SCL0
Display RAM
56/40 bytes (*1)
Reset circuit
8/16 bits
I/O 2 (0x5000–)
Interrupt controller
(ITC)
UART
SPI
I/O 1 (0x4000–)
I/O port (P)/
port MUX
EXCL0–2
Real-time clock
(RTC) (*2)
R/F converter
(RFC)
A/D converter
(ADC10)
I
2
C slave
(I2CS)
SDA1, SCL1,
#BFR
8-bit timer
(T8F)
Test circuit
16-bit PWM timer
(T16E)
EXCL3, TOUT3, TOUTN3
RFIN0–1, REF0–1,
SENA0–1, SENB0–1,
RFCLKO
AVDD
AIN0–AIN7, #ADTRG
8-bit OSC1 timer
(T8OSC1)
TOUT4
2.1 Block DiagramFigure 1.
*1: The models have a different memory size, LCD outputs and I/O port configurations.
*2: The real-time clock (RTC) and 16-bit PWM timer (T16A2) are available only in the S1C17624 and S1C17604.
Memory/function S1C17624 S1C17604 S1C17622 S1C17602 S1C17621
Flash memory 128K bytes 64K bytes 32K bytes
Internal RAM 8K bytes 4K bytes 2K bytes
Display RAM 56 bytes 40 bytes 56 bytes 40 bytes
SEG/COM output pins
(static, 1/2–1/4 duty)
SEG0–SEG55
COM0–COM3
SEG0–SEG39
COM0–COM3
SEG0–SEG55
COM0–COM3
SEG0–SEG39
COM0–COM3
SEG/COM output pins
(1/8 duty)
SEG0–SEG51
COM0–COM7
SEG0–SEG35
COM0–COM7
SEG0–SEG51
COM0–COM7
SEG0–SEG35
COM0–COM7
I/O
port pins 47 (P00–P56) 36 (P00–P43) 47 (P00–P56) 36 (P00–P43)
Real-time clock (RTC) Available Unavailable
16-bit PWM timer (T16A2) Available Unavailable
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