Epson S1C17624 - Px Port Output Data Registers (Px_OUT); Px Port Output Enable Registers (Px_OEN); Px Port Pull-up Control Registers (Px_PU)

9 I/O PORTS (P)
9-8
Seiko Epson Corporation S1C17624/604/622/602/621 TECHNICAL MANUAL
Px Port Output Data Registers (Px_OUT)
Register name Address Bit Name Function Setting Init. R/W Remarks
Px Port Output
Data Register
(Px_OUT)
0x5201
0x5211
0x5221
0x5231
0x5241
0x5251
(8 bits)
D7–0
PxOUT[7:0]
Px[7:0] port output data 1 1 (H) 0 0 (L) 0 R/W
Note: The PxOUTy bits for unavailable ports are reserved and always read as 0.
D[7:0] PxOUT[7:0]: Px[7:0] Port Output Data Bits
Sets the data to be output from the port pin.
1 (R/W): High level
0 (R/W): Low level (default)
PxOUTy corresponds directly to the Pxy pins. The data written will be output unchanged from the port
pins when output is enabled (PxOENy = 1). The port pin w
ill be High when the data bit is set to 1 and
Low when set to 0.
Port data can also be written when output is disabled (PxOENy = 0) (the pin status is unaffected).
Px Port Output Enable Registers (Px_OEN)
Register name Address Bit Name Function Setting Init. R/W Remarks
Px Port
Output Enable
Register
(Px_OEN)
0x5202
0x5212
0x5222
0x5232
0x5242
0x5252
(8 bits)
D7–0
PxOEN[7:0]
Px[7:0] port output enable 1 Enable 0 Disable 0 R/W
Notes: • The PxOENy bits for unavailable ports are reserved and always read as 0.
•
P43 can only be used as an output port. For how to configure P43, see the P43MUX/
P40_43PMUX register description.
D[7:0] PxOEN[7:0]: Px[7:0] Port Output Enable Bits
Enables or disables port outputs.
1 (R/W): Enabled
0 (R/W): Disabled (default)
PxOENy is the output enable bit that correspond
s directly to Pxy port. Setting to 1 enables output and
the data set in PxOUTy is output from the port pin. Output is disabled when PxOENy is set to 0, and the
port pin is set into high-impedance status. The peripheral module determines whether output is enabled
or disabled when the port is used for a peripheral module function.
Refer to Table 9.3.1 for more information on input/output status for p
orts, including settings other than
for the PxOEN register.
Px Port Pull-up Control Registers (Px_PU)
Register name Address Bit Name Function Setting Init. R/W Remarks
Px Port Pull-up
Control Register
(Px_PU)
0x5203
0x5213
0x5223
0x5233
0x5243
0x5253
(8 bits)
D7–0
PxPU[7:0]
Px[7:0] port pull-up enable 1 Enable 0 Disable 1
(0xff)
R/W
Note: The PxPUy bits for unavailable ports are reserved and always read as 0.