Model
5340A
Theory of Operation
Table
4
-
1.
Example
ROM
Programming for the Equation
Y
=
2
X
+I
X
(decimal) (binary)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
00000
00001
00010
0001
1
00100
00101
00110
00111
01000
01001
01010
01011
01100
01
101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Y
(decimal)
(binary)
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
0000
0001
0000
0011
0000
0101
0000
0111
0000
1001
0000
1011
0000
1101
0000
1111
0001 0001
0001
0011
0001 0101
0001 0111
0001 1001
0001 1011
0001 1101
0001
1111
0010 0001
0010 0011
0010 0101
0010 0111
0010
1001
0010 1011
0010 1101
0010
1111
0011 0001
0011 0011
0011 0101
0011 0111
0011 1001
0011 1011
0011 1101
0011
1111
4
-
12.
The programs for the
ROM's
used in the
5340A
are given next to the schematic where they
are used. See Section
VIII
schematics.
4
-
13.
Decade
Counter
1820
-
0055
4
-
14.
The logic diagram, oukline drawing, and truth table for this decade counter are shown in
Figure
4
-
4.
The unit consists of four dual
-
rank, master
-
slave flip
-
flops that are connected
internally to provide
a
+5
coun,ter and
a
+2
counter. Gated direct reset lines are provided
to
inhibit
count inputs and return
al1,putputs to logic
0
or
BCD
9.
The
RO
inputs
at
pins
2
and
3
reset the
decades
to
zero and the
R9
inputs
at
pins
6
and
7
reset the decades to nine. When the
BD
input
is
externally connected to the
A
output, the unit operates
as
a
BCD
decade counter.
With
the
D
output connected to the
A
input,
+10
operation
is
obtained.
4
-
4
To Next Page
Loading...
Need help?
General
