Model
5340A
Theory of Operation
4
-
117.
Preamplifier board assembly
No.
1 (AlA4)
consists of
a
matching network and a
100
MHz
low
-
pass filter. If
NF1
is
either
20
MHz above or below
F,,
a
20
MHz output will be produced.
Subsequent circuits in phase detector
A4
are used to ensure
that
the Nth harmonic of VCOl is
20
MHz above
F,.
This eliminates ambiguity problems in the transfer oscillator phase lock
loop.
4
-
1 18.
Limiter amplifier
A13
provides wide
-
band, high
-
gain amplification and will limit on
signal inputs of
-
35
dBm or greater. This ensures that phase detector
A4
will operate on the
highest signal amplitude present
at
the input of
A13.
This feature prevents the counter from
measuring spurious inputs or harmonically related signals that are lower in amplitude than the
signal of interest. Amplitude discrimination
is
effective for signals
20
dB different in amplitude
(10 dB typical).
4
-
119.
Phase detector
A4
receives the
20
MHz limiter output from
A13
and a
20
MHz reference
signal from
A15.
The reference signal originates
as
10
MHz in the frequency standard
A18. A15
provides frequency doubling.
A4
determines the phase difference between the
20
MHz reference
signal and the
20
MHz input signal and provides
a
dc output which is proportional to the sine of
the phase angle between the two
20
MHz signals. This output
is
used to change the VCO fre
-
quency to provide
a
20
MHz output from
A13
which is in phase with the
20
MHz doubler output.
In addition,
A4
has
a
90
"
phase
-
shifter and
a
quadrature detector to determine whether the VCO
harmonic is
20
MHz above or below
F,.
The output of the quadrature detector connects to
circuits in
A5.
If phase detector
No. 1
in
A4
has
a
zero output but the quad detector senses that
NF1
is
20
MHz below
F,,
then the circuits in
A5
will allow the VCO to continue searching
until the other
20
MHz point
is
reached. When the quad detector determines that the proper
value of
NF1
has been reached,
A5
disables the search function. If there are phase differences
between the
20
MHz reference and the
20
MHz output of
A13,
the dc output of
A4
(phase detector
1)
will drive
A7
to correct the VCO frequency. In this manner, the input phase lock loop searches,
determines the proper lock point, and locks on the input signal
F,.
When lock
is
achieved, the
VCO output
(F1)
drives
All
and
A22.
4
-
120.
Search programmer
A6
serves to normalize the phase lock loop gain. When
F,
is in the
upper frequency range (toward
18
GHz), the loop gain and search amplitude are minimized.
Conversely, higher loop gain and search amplitudes are required for lower frequencies. To deter
-
mine at what frequency range the loop
is
operating, the search programmer receives
N
infor
-
mation from the
N
determination circuitry via the control board. The loop gain and serach level
are controlled by the program attenuator and program shunt attenuator in
A6.
These in turn are
controlled by the step programmer.
4
-
121.
For
example, if a signal generator frequency
is
being measured, the generator frequency can be
varied and the phase lock loop will track the frequency change until the
VCO
frequency reaches
the end of its range then acquires
a
new lock point near the middle of the VCO range.
For
signal
inputs containing frequency modulation, see Figure
3
-
1
for the
FM
characteristics of the
5340A.
I
The input phase lock loop will track input frequency variations including
FM.
4
-
122.
Transfer
Phase
Lock
Loop
4
-
123.
The transfer phase lock loop consists of
All, A10, A9,
and
A8.
This phase lock loop
produces an output
(F2)
that is related to
F1
as
follows:
F2
=
F1
f
20
kHz.
F2
is
used to drive the sampler driver in
A2
which produces narrow pulse outputs that are rich in
harmonics.
Sampler
No. 2
also receives
F,
and produces an intermediate frequency
FIF~
which
is
related to the inputs
as
follows:
FIF~
=
NF2
-
F,
=
FIF~
f
NFO;
where
Fo
is
a
20
kHz offset introduced into phase lock loop
No.
2.
The
20
kHz is derived from time base
A20
and connects to
a
bandpass ,filter gate in
A8.
VCO
No.2
receives
a
feed
-
forward signal from
A7
to set VCO
No. 2
frequencp
(F2)
approximately equal to
F1.
Mixer
All
determines the
difference frequency betwekn
F1
and
F2. A8
determines the phase difference between the
output of the mixer
All
land the
20
kHz reference signal and supplies
a
dc output to
A9
which
is proportional to the phase difference.
A9
drives
A10
to lock
F2
to a frequency which
is
20
kHz above or below
F1.
4
-
34
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