*RST
Resets instrument to factory default state. This is similar to SYSTem:PRESet. The difference is that *RST
resets the instrument for SCPI operation, and SYSTem:PRESet resets the instrument for front panel oper-
ation. As a result, *RST turns the histogram and statistics off, and SYSTem:PRESet turns them on.
Parameter Typical Return
(none) (none)
Reset the instrument:
*RST
l Does not affect stored instrument states (see *SAV).
*SRE <enable_value>
*SRE?
Service Request Enable. Enables bits in the enable register for the Status Byte Register group. An enable
register defines which bits in the event register will be reported to the Status Byte register group. You can
write to or read from an enable register.
Parameter Typical
Return
Decimal sum of the bits in the register, default 0. For example, to enable bit 2 (value 4), bit 3
(value 8), and bit 7 (value 128), the decimal sum would be 140 (4 + 8 + 128). Default: 0.
+24
Enable bits 3 and 4 in the enable register:
*SRE 24
l To enable specific bits, specify the decimal value corresponding to the binary-weighted sum of the bits
in the register. The selected bits are summarized in the "Master Summary" bit (bit 6) of the Status Byte
Register. If any of the selected bits change from 0 to 1, the instrument generates a Service Request sig-
nal.
l *CLS clears the event register, but not the enable register. An event register is a read-only register that
latches events from the condition register. While an event bit is set, subsequent events corresponding
to that bit are ignored.
l *PSC (power-on status clear) determines whether Status Byte enable register is cleared at power on.
For example, *PSC 0 preserves the enable register contents through power cycles.
l The Status Byte enable register is not cleared by *RST.
SCPI Programming Reference
274
Keysight Truevolt Series Operating and Service Guide
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