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Slide Scanner Repair Manual Functional Description
The features of the primary correction ASIC in order of process are:
• Dark Level Uniformity Correction pixel-by-pixel.
• Brightness Correction with a potential correction range 0 to 1.99 (depending on
implementation) with 2
-10
resolution.
• Uniformity Gain Correction pixel-by-pixel using 10-bits per color per pixel. Correction
range of 1.0 to 1.99 with 2
-10
resolution, optimized in conjunction with the Brightness
Correction independently for each color.
• Single bad pixel replace based on exceeding range of Dark or Uniformity Correction
and/or programmed criterion.
• Accommodates 48 bits/pixel correction for up to 5460 pixels/line including the retrace
in a 32K x 8 SRAM.
Note: The Digital Signal Processor (DSP) on the SS35 PLUS microcontroller PC
board is used to process the first five features.
• Resolution modes supported.
• Horizontal Area of Interest control.
• Vertical Area Of Interest under direct microcontroller control.
• Programmable realignment for an arbitrary number of lines per color spacing.
• 2 Mbytes per second sustained data rate (max) at Full Resolution and Width .
• 1M DRAM controller.
DRAM Controller (Buffer)
The DRAM controller manages data for realignment, the 3/4 shrink scratch pad, and
general purpose buffering. As a buffer it feeds image data through the color correction
ASIC to the host computer. It is nominally sized at 1M and it provides a number
of purposes.
In the calibration mode, the buffer is configured as a 4K pixel by 256 line buffer to store raw
scanned data. Raw data is scanned into the buffer on a line-by-line basis. The
microcontroller has access to the data, sampling a single pixel over multiple lines, to allow
averaging of the raw data before determining correction factors.
In the scanning mode, 1/16 of the buffer is used for one line of temporary storage for the
3/4 shrink mode. The remaining 15/16 are divided among the three channels and used
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