Renesas M16C/29 Series

1. Overview
page 4
puorG92/C61M
854fo7002,03.raM21.1.veR
2110-1010B90JER
1.2 Block Diagram
Figure 1.1 is a block diagram of the M16C/29 Group, 80-pin package.
Figure 1.1 M16C/29 Group, 80-Pin Block Diagram
O u t p u t ( T i m e r A ) : 5
I n p u t ( T i m e r B ) : 3
I n t e r n a l P e r i p h e r a l F u n c t i o n s
W a t c h d o g t i m e r
( 1 5 b i t s )
DMAC
(2 channels)
M e m o r y
ROM
(1)
RAM
(2)
A / D c o n v e r t e r
( 1 0 b i t s x 2 7 c h a n n e l s )
U A R T / c l o c k s y n c h r o n o u s S I / O
( 8 b i t s x 3 c h a n n e l s )
System clock generator
X
I N - X O U T
X C I N - X C O U T
O n - c h i p o s c i l l a t o r
P L L f r e q u e n c y s y n t h e s i z e r
M 1 6 C / 6 0 S e r i e s C P U C o r e
R0LR0H
R1H R1L
R 2
R3
A 0
A 1
F B
S B
ISP
USP
INTB
Multiplier
8
P
o
r
t
P
1
0
7
P
o
r
t
P
9
8
P
o
r
t
P
8
P
o
r
t
P
7
8
P
o
r
t
P
6
8
Port P2
8
PC
FLG
T i m e r ( 1 6 b i t s )
3 - p h a s e P W M
Port P3
8
Port P1
8
I / O P o r t s
Port P0
8
C l o c k s y n c h r o n o u s S I / O
( 8 b i t s x 2 c h a n n e l s )
M u l t i - m a s t e r I
2
C b u s
(
)
T i m e r S
I n p u t c a p t u r e /
O u t p u t c o m p a r e
T i m e m e a s u r e m e n t : 8 c h a n n e l s
W a v e f o r m g e n e r a t i n g : 8 c h a n n e l s
C A N m o d u l e
( 1 c h a n n e l )
CRC calculation circuit
(CCITT, CRC-16)
NOTES:
1. The ROM capacity varies depending on each product.
2. The RAM capacity varies depending on each product.