UART0 to UART2
M30240 Group
Rev.1.00 Sep 24, 2003 Page 89 of 360
1.2.23.1.1 Polarity select function
As shown in Figure 1.83, the CLK polarity select bit (bit 6 at addresses 03A4
16
, 03AC
16
, 037C
16
) allows se-
lection of the polarity of the transfer clock.
Figure 1.83: Polarity of transfer clock
1.2.23.1.2 LSB first/MSB first select function
As shown in Figure 1.84, when the transfer format select bit (bit 7 at addresses 03A4
16
, 03AC
16
, 037C
16
) =
“0”, the transfer format is “LSB first”; when the bit = “1”, the transfer format is “MSB first”.
Note: This applies CLK polarity select bit = “0”.
Figure 1.84: Transfer format
1.2.23.1.3 Transfer clock output from multiple pins function (UART1)
This function allows using two transfer clock output pins and choosing one of the two to output a clock by using
the CLK and CLKS select bit (bits 4 and 5 at address 03B0
16
). See Figure 1.85. The multiple pins function is
valid only when the internal clock is selected for UART1. Note that when this function is selected, the UART1
CTS/RTS function cannot be used.
Figure 1.85: The transfer clock output from the multiple pins function usage
• When CLK polarity select bit = “1”
Note 2: The CLK pin level when not
transferring data is “L”.
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
D
0
T
X
D
i
R
X
D
i
CLK
i
• When CLK polarity select bit = “0”
Note 1: The CLK pin level when not
transferring data is “H”.
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
T
X
D
i
R
X
D
i
CLK
i
LSB first
• When transfer format select bit = “0”
D0
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
1
D
2
D
3
D
4
D
5
D
6
D
7
T
X
D
i
R
X
D
i
CLK
i
• When transfer format select bit = “1”
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
T
X
D
i
R
X
D
i
CLK
i
MSB first
Microcomputer
T
X
D
1
(P6
7
)
CLKS
1
(P6
4
)
CLK
1
(P6
5
)
IN
CLK
IN
CLK
Note: This applies when the internal clock is selected and transmission
is performed only in clock synchronous serial I/O mode.
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