Analog Modules
4-38
Programmable Logic Controllers S7-300 Module Data
A5E00105505-03
Tip
You should disable any analog channels that are not being used to reduce the scan
time in STEP 7.
Overview of the settling time and response time of the analog output modules
t
A
t
Z
t
E
t
1
t
2
t
A
= Response time
t
Z
= Scan time corresponds to n conversion time (n = activated channels)
t
E
= Settling time
t
1
= New digitized output value is present
t
2
= Output value transferred and converted
t
3
= Specified output value reached
t
3
Figure 4-6 Settling and Response times of the Analog Output Channels
Settling time
The settling time (t
2
to t
3
) – in other words, the time elapsing from application the
converted value until the specified value is reached at the analog output – is
load-dependent. A distinction is made between resistive, capacitive and inductive
loads.
For the settling times of the different analog output modules as a function of load
refer to the technical specifications of the module concerned, starting at Section
4.28.
Response time
The response time (t
1
to t
3
) – in other words, the time elapsing from application of
the digital output values in the internal memory until the specified value is reached
at the analog output – in a worst case scenario is the sum of the scan time and the
settling time.
You have a worst case situation, if, shortly prior to the transfer of a new output
value, the analog channel has been converted and is not converted again until all
other channels are converted (scan time).
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