Performance Check Procedure
TRIGGER CPLG DC
g. Move test signal from CH 1 to the CH 2 input.
h. Set leveled sine-wave generator output to produce a 1.0 division disī¦
play amplitude at 150 MHz.
I. CHECKāthat a stable display can be obtained. (The Trigger LEVEL
control may be adjusted to improve the display stability.)
j. Repeat the procedure for CH 3 and CH 4 (turn on the appropriate
VERTICAL MODE and move the test signal as required).
k. Move test signal to the CH 1 input.
l. Set VERTICAL MODE to CH 1 (others off).
m. Remove the 2X BNC attenuator from the test signal path.
n. Set leveled sine-wave generator output for a 2.2 division display ampliī¦
tude at 100 MHz.
o. CHECKāthat the display is stably triggered with NOISE REJ Trigger
CPLG but is not triggered with HF REJ Trigger CPLG.
p. Set leveled sine-wave generator output for a 0.5 division display ampliī¦
tude at 100 MHz.
q. CHECKāthat the display is not triggered in NOISE REJ Trigger CPLG.
r. Set:
TRIGGER CPLG DC
Horizontal MODE B
A/B SELECT B Trigger
s. Repeat 100 MHz NOISE REJ Trigger CPLG procedure for the B
Trigger.
5. Single Sweep Mode
a. Set:
Horizontal MODE
A SEC/DIV
A/B SELECT
A
10 (is
A Trigger
7-32
2245A Operators