Tektronix 7613 User Manual

Circuit Description—-7613/R7613 Service
tl .
Vertical Mode
Mainframe
Chop Signai to
Control stage
Plug-in
Sp 1]
2 MHz
Clock Pulses 11
from Clock T
Generator stage
FF
U1238
Sp 1
FF
U123A
Chop
Buffer
Q142,0147
Plug-In
Chop Drive
Fig. 3-7. Detailed logic diagram of Chop Counter stage.
the Plug-in Chop Buffer stage. Idealized waveforms showing
the timing relationship between the input and output
signals for this stage are shown in Fig. 3-8.
Vertical Mode Control
The Vertical Mode Control stage is made up of discrete
components CR124-CR125, CR126, CR130-CR155,
CR172, and buffer amplifier Q132-0137. These com-
ponents develop the Mainframe Vertical Mode Command
which is connected to the Main Interface circuit (vertical
plug-in compartments and trigger selection circuitry) and
the Vertical Interface circuit to indicate which vertical unit
is to be displayed. When this output level is HI, the right
vertical unit is displayed and when it is LO, the left vertical
unit is displayed.
The VERT MODE switch located on diagram 7 provides
control levels for this stage. This switch provides a HI level
on only one of four output lines to indicate the selected
vertical mode; the remaining lines are LO. The fifth mode,
LEFT, is indicated when all four output lines are LO.
Operation of this stage in all positions of the VERT MODE
switch is as follows:
Right. When the VERT MODE switch is set to RIGHT,
a HI fevel is connected to the Buffer Amplifier through
R126 and CR126. The LO level at the anodes of diodes
CR125 and CR130 holds them reverse biased. The resultant
Vertical Mode Command output from the Vertical Mode
Buffer Amplifier is a HI level to indicate that the right
vertical unit is to be displayed.
Chop. In the CHOP position of the VERT MODE
switch, a HI level is applied to the anodes of diodes
CR124-CR125 through R125. Both diodes are forward
biased so the Vertical Chop Signal from pin 9 of U123B can
pass to the emitter of Q132. This signal switches between
the HI and LO levels at a one-megahertz rate and it
produces a corresponding Mainframe Vertical Mode Com-
mand output at the emitter of 0137. When this output is
Clock puises from
Clock Generator stage
JLILILA
LILILI
(2 MHz)
Mainframe
Pin 9 U1238 —_ Chop Signal
(1 MHz) To Vertical Mode
Control stage
. Vertical Plug-In
wae Chop ge
To Plug-In
Chop Buffer stage
Fig. 3-8. idealized input and output waveforms for Chop Counter stage.
3-13
7613

Tektronix 7613 Specifications

General

Brand	Tektronix
Model	7613
Category	Test Equipment
Language	English