Teledyne 200E - Page 286

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654321
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Title
Number RevisionSize
B
Date: 13-Jan-2003 Sheet of
File: N:\PCBMGR\RELEASED\03954cc\03956B.ddbDrawn By:
Te
Te
03956 B
M100E/M200E Relay PCB SCHEMATIC
1
3
1 2
U2A
SN74HC04
3 4
U2B
5 6
U2C
11 10
U2E
13 12
147
U2F
OUT4
1
K
2
OUT 3
3
GND
4
GND
5
OUT 2
6
K
7
OUT 1
8
IN 1
9
IN 2
10
VCC
11
GND
12
GND
13
ENABLE
14
IN 3
15
IN 4
16
U5
UDN2540B(16)
1
2
3
4
5
J3
CON5
VBATT
1
VOUT
2
VCC
3
GND
4
BATT_ON
5
LOW LINE'
6
OSC IN
7
OSC SEL
8
RESET
16
RESET'
15
WDO'
14
CD IN'
13
CD OUT'
12
WDI
11
PFO'
10
PFI
9
U4
MAX693
C2
0.001
VCC
R4
1M
C3
1
A
A
K
K
D17
RLS4148
VCC
D1
RED
2 1 3 4 5 6 7 8 9
10
RN1
330
I2C_Vcc
D2
YEL
D3
YEL
D4
YEL
D7
GRN
D8
GRN
D9
GRN
A
A
K
K
D10
GRN
9 8
U2D
VCC
1
2
3
4
5
6
7
8
J4
8 PIN
VALVE0
VALVE1
VALVE2
VALVE3
1
1
2
2
+
C6
2000/25
+12V
1
2
3
4
5
6
7
8
9
10
J5
CON10THROUGH
11
2
3
4
5
6
7
8
9
10
J7
CON10THROUGH
11
2
3
4
5
6
7
8
9
10
J8
CON10THROUGH
11
2
3
4
5
6
7
8
9
10
J9
CON10THROUGH
DGND
VCC
AGND
+15V
AGND
-15V
+12RET
+12V
EGND
CHS_GND
AC_Line
AC_Neutral
I2C_Vcc
1 2
JP3
HEADER 1X2
DC PWR IN KEYBRD MTHR BRD SYNC DEMOD SPARE
VCC
1 2
+
3
-
4
K1
SLD-RLY
1 2
+
3
-
4
K2
SLD-RLY
1 2
+
3
-
4
K3
SLD-RLY
I2C_Vcc
1
2
3
JP4
WTCDG OVR
+
C5
10/16
1
1
2
2
+
C4
10/16
C1
0.1
R3
20K
1
2
3
4
J1
4 PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J2 16 PIN
11
2
3
4
5
6
7
8
9
10
J10
CON10THROUGH
1
TP1
DGND
1
TP2
+5V
1
TP3
AGND
1
TP4
+15V
1
TP5
-15V
1
TP6
+12RT
1
TP7
+12V
T
General Trace Width Requirements
1. Vcc (+5V) and I2C VCC should be 15 mil
2. Digitial grounds should be at least 20 mils
3. +12V and +12V return should be 30 mils
4. All AC lines (AC Line, AC Neutral, RELAY0 - 4, All signals on JP2) should be 30 mils wide, with 120 mil isolation/creepage distance
around them
5. Traces between J7 - J12 should be top and bottom and at least 140 mils.
6. Traces to the test points can be as small as 10 mils.
T
Q1
IRF7205
RELAY0 RELAY1 RELAY2
1 2
3 4
5 6
7 8
JP1
HEADER 4X2
R1
2.2K
R2
2.2K
VCC
R6
10K
R5
10K
INT
1
A1
2
A2
3
SCL
22
SDA
23
P10
13
P00
4
P01
5
P02
6
P03
7
P04
8
P05
9
P06
10
P07
11
Vss
12
A0
21
P11
14
P12
15
P13
16
P14
17
P15
18
P16
19
P17
20
Vdd
24
U1
PCF8575
I2C_Vcc
IO3
IO4
IO10
IO11
IO12
IO13
IO14
IO15
AC_Neutral
RELAY0
RELAY1
RELAY2
VLV_ENAB
1 2 3 4 5 6 7 8 9 10 11 12
JP2
Heater Config Jumper
RELAY0
TS0
TS1
TS2
RELAY1
RELAY2
TS0
TS1
TS2
11
2
3
4
5
6
7
8
9
10
J11
CON10THROUGH
11
2
3
4
5
6
7
8
9
10
J12
CON10THROUGH
RELAY0
RELAY1
RELAY2WDOG
RL0 RL1 RL2 VA0 VA1 VA2 VA3
COMMON0
COMMON1
COMMON2
LOAD0
LOAD1
LOAD2
REV AUTH DATE
B CAC 10/3/02 CE MARK LINE VOLTAGE TRACE SPACING FIX
APPLIES TO PCB 03954