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ABB REB650 - Page 391

ABB REB650
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Design of the time system (clock synchronization)
SW-time
Protection
and control
functions
Time tagging and general synchronization
Commu
- nication
Events
ANSI09000210-1-en.vsd
External
synchronization
sources
Disabled
SNTP
DNP
IRIG-B
Time-
regulator
IEC60870-5-103
ANSI09000210 V1 EN
Figure 161: Design of time system (clock synchronization)
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A
function is synchronized from a higher level and provides synchronization to lower levels.
Function
Synchronization from
a higher level
Optional synchronization of
modules at a lower level
IEC09000342-1-en.vsd
IEC09000342 V1 EN
Figure 162: Synchronization principle
A function is said to be synchronized when it periodically receives synchronization
messages from a higher level. As the level decreases, the accuracy of the
synchronization decreases as well. A function can have several potential sources of
synchronization, with different maximum errors. This gives the function the possibility
to choose the source with the best quality, and to adjust its internal clock after this
source. The maximum error of a clock can be defined as:
1MRK 505 277-UUS C Section 15
Basic IED functions
385
Technical Manual

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