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ABOV Semiconductor Co., Ltd.
11.5.4 Block Diagram
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
T0CNT (8Bit)
fx/4
fx/8
fx/32
fx/128
fx/512
fx/2048
3
T0CK[2:0]
T0EN
8-bit Timer 0 Counter
T0DR (8Bit)
Comparator
T0IFR
To interrupt
block
8-bit Timer 0 Data Register
INT_ACK
Clear
T0CC
Clear
Match signal
Match
T0CDR (8Bit)
Clear
EINT10
EIPOL1[1:0]
FLAG10
(EIFLAG.2)
INT_ACK
Clear
To interrupt
block
2
T0MS
Figure 11.11 8-bit Timer 0 Block Diagram
11.5.5 Register Map
Timer 0 Capture Data Register
Table 11.6 Timer 0 Register Map
11.5.6 Timer/Counter 0 Register Description
The timer/counter 0 register consists of timer 0 counter register (T0CNT), timer 0 data register (T0DR), timer 0 capture
data register (T0CDR), and timer 0 control register (T0CR). T0IFR bit is in the external interrupt flag register (EIFLAG).