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Abov MC96F8204 Series

Abov MC96F8204 Series
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165
MC96F8204
ABOV Semiconductor Co., Ltd.
12 Power Down Operation
12.1 Overview
The MC96F8204 has two power-down modes to minimize the power consumption of the device. In power down mode,
power consumption is reduced considerably. The device provides three kinds of power saving functions, Main-IDLE,
Sub-IDLE and STOP mode. In three modes, program is stopped.
12.2 Peripheral Operation in IDLE/STOP Mode
Peripheral
IDLE Mode
STOP Mode
CPU
ALL CPU Operation are Disable
ALL CPU Operation are Disable
RAM
Retain
Retain
Basic Interval Timer
Operates Continuously
Stop
Watch Dog Timer
Operates Continuously
Stop (Can be operated with WDTRC OSC)
Watch Timer
Operates Continuously
Stop (Can be operated with sub clock)
Timer0~2
Operates Continuously
Halted (Only when the Event Counter Mode is Enabled,
Timer operates Normally)
ADC
Operates Continuously
Stop
USART
Operates Continuously
Only operate with external clock
I2C
Operates Continuously
Only operate with external clock
Internal OSC
Oscillation
Stop when the system clock (fx) is fHFIRC or fLFIRC.
WDTRC OSC
(5kHz)
Can be operated with setting value
Can be operated with setting value
Main OSC
(0.4~12MHz)
Oscillation
Stop when fx = fXIN
Sub OSC
(32.768kHz)
Oscillation
Stop when fx = fSUB
I/O Port
Retain
Retain
Control Register
Retain
Retain
Address Data Bus
Retain
Retain
Release Method
By RESET, all Interrupts
By RESET, Timer Interrupt (EC1, EC2),
External Interrupt, USART by RX, WT, WDT
Table 12.1 Peripheral Operation during Power Down Mode

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