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ABOV Semiconductor Co., Ltd.
11.9 I2C
11.9.1 Overview
The I2C is one of industrial standard serial communication protocols, and which uses 2 bus lines Serial Data Line
(SDA) and Serial Clock Line (SCL) to exchange data. Because both SDA and SCL lines are open-drain output, each
line needs pull-up resistor. The features are as shown below.
− Compatible with I2C bus standard
− Multi-master operation
− Up to 400kHz data transfer read speed
− 7 bit address
− Support two slave address
− Both master and slave operation
− Bus busy detection
11.9.2 Block Diagram
Receive Shift Register
(RXSR)
Transmit Shift Register
(TXSR)
I
N
T
E
R
N
A
L
B
U
S
L
I
N
E
SCLK
(fx: System clock)
SDA
SCL
I2CDR, (Rx)
VSS
N-ch
VSS
N-ch
SCL Out
Controller
SDA In/Out
Controller
SDA Hold Time Register
I2CSDHR
SCL Low Period Register
I2CSCLR
SCL High Period Register
I2CSCHR
Time Generator
And
Time Controller
I2CDR, (Tx)
Slave Address Register
I2CSAR
General Call And
Address Detector
IICGCE
STOP/START
Condition Generator
STOPC
STARTC
ACK Signal
Generator
ACKEN
RXACK, GCALL,
TEND, STOPD,
SSEL, MLOST,
BUSY, TMODE
Interrupt
Generator
To interrupt
block
IICIFRINT_ACK
Clear
IICIE
NOTE)
1. When the corresponding port is an sub-function for SCL/SDA pin, the SCL/SDA pins are automatically set to
the N-channel open-drain outputs and the input latch is read in the case of reading the pins. The
corresponding pull-up resistor is determined by the control register.
Figure 11.35 I2C Block Diagram
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