Abov MC96F8204 Series User Manual

107
MC96F8204
ABOV Semiconductor Co., Ltd.
11.6.4 16-bit PPG Mode
The timer 1/2 has a PPG (Programmable Pulse Generation) function. In PPG mode, TnO/PWMnO pin outputs up to
16-bit resolution PWM output. This pin should be configured as a PWM output by setting P0FSRL[5:4](T1),
P0FSRL[7:6](T2) to ‘01’. The period of the PWM output is determined by the TnADRH/TnADRL. And the duty of the
PWM output is determined by the TnBDRH/TnBDRL.
TnMS[1:0]
TnPOL
Reload
A Match
TnCC
TnEN
P
r
e
s
c
a
l
e
r
fx
M
U
X
fx/2
fx/4
fx/64
fx/512
fx/2048
fx/8
fx/1
Comparator
16-bit Counter
TnCNTH/TnCNTL
16-bit B Data Register
TnBDRH/TnBDRL
Clear
B Match
Edge
Detector
TnECE
ECn
Buffer Register B
Comparator
16-bit A Data Register
TnADRH/TnADRL
TnIFR
INT_ACK
Clear
To interrupt
block
A Match
Buffer Register A
Reload
Pulse
Generator
TnO/
PWMnO
R
TnEN
3
TnCK[2:0]
2
T1EN
T1CRH
1
ADDRESS:99H/B1H
INITIAL VALUE : 0000_0000B
–
T1MS1 T1MS0
– – –
T1CC
–
1 1 – – – X
T1CK2
T1CRL
X
ADDRESS:98H/B0H
INITIAL VALUE : 0000_0000B
T1CK1 T1CK0 T1IFR RLDnEN T1POL T1ECE T1CNTR
X X
X X X X X
A Match
TnCC
TnEN
A Match
TnCC
TnEN
RLDnEN
NOTE)
1. The TnEN is automatically cleared to logic “0” after one pulse is generated at a PPG one-shot
mode.
Figure 11.17 16-bit PPG Mode for Timer 1/2

Abov MC96F8204 Series Specifications

General

Brand	Abov
Model	MC96F8204 Series
Category	Microcontrollers
Language	English