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Abov MC96F8204 Series - Page 108

Abov MC96F8204 Series
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108
MC96F8204
ABOV Semiconductor Co., Ltd.
X 1 2 4 5 6 8 M-1 M 0 2 3
Timer n clock
Counter
TnADRH/L
Tn Interrupt
PWMnO
B Match
Repeat Mode(TnMS = 11b) and "Start High"(TnPOLA = 0b).
Set TnEN
0
Clear and Start
3 7 1
M
A Match
1. TnBDRH/L(5) < TnADRH/L
PWMnO
A Match
2. TnBDRH/L >= TnADRH/L
PWMnO
A Match
3. TnBDRH/L = "0000H"
Low Level
X 1 2 4 5 6 8 M-1 M 0
Timer n clock
Counter
TnADRH/L
Tn Interrupt
PWMnO
B Match
One-shot Mode(TnMS = 10b) and "Start High"(TnPOLA = 0b).
Set TnEN
0
Clear and Start
3 7
M
A Match
1. TnBDRH/L(5) < TnADRH/L
PWMnO
A Match
2. TnBDRH/L >= TnADRH/L
PWMnO
A Match
3. TnBDRH/L = "0000H"
Low Level
Figure 11.18 16-bit PPG Mode Timming chart for Timer 1/2

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